Index · Projects
Selected Work
A focused archive of RTL, verification, and accelerator design projects.
FPGA / Architecture Verified
INT8 Systolic MAC Array
Output-stationary INT8 systolic array for transformer GEMM. Verified bit-exact across 10,000 random matmuls; closes timing at 100 MHz on Artix-7.
FPGASystolic ArrayML AcceleratorArchitecture
DSP / Embedded Verified
Real-Time FM Software-Defined Radio
Real-time FM SDR on Raspberry Pi 4 — mono, stereo, and RDS from RF. Three-thread pipeline with polyphase resampling, holds real-time at 600 MHz, 101 taps.
DSPEmbeddedReal-TimeSDRMultithreading
FPGA / RTL Verified
RTL Image Decompression Pipeline
JPEG-style FPGA decoder in SystemVerilog on the DE1-SoC at 50 MHz. Four multipliers time-multiplexed across chroma upsampling, YCbCr→RGB, and 2-D IDCT.
FPGARTLDSPImage ProcessingFSM
Embedded / Sensor Fusion Verified
ToF 3D Room Scanner
ARM Cortex-M room scanner — stepper motor + VL53L1X time-of-flight sensor, streams distances over UART, renders as a 3D point cloud in Open3D.
EmbeddedARM Cortex-MI2CStepper Motor3D